The other main type of processor architecture, CISC ( the x86 processor being a popular CISC instruction set), allows for memory access in nearly every instruction. 另外一种主要的处理器体系结构CISC(x86处理器就是一种流行的CISC指令集)几乎允许在每条指令中进行内存访问。
The PowerPC uses a load/ store ( also called RISC) instruction set, which means that the only time it accesses main memory is for loading into registers or copying a register to memory. PowerPC使用了加载/存储(也成为RISC)指令集,这意味着访问主存的惟一时机就是将内存加载到寄存器或将寄存器中的内容复制到内存中时。
What's happening here is that the instruction is checking whether a memory location has an expected value; if it does, then the new value is copied into the location. 这里发生的操作是:指令检查一个内存位置是否包含预期的值;如果是这样,就把新的值复制到这个位置。
If even a single thread's instruction pointer refers to a function's code in memory or a single thread's kernel stack refers to a return address within the function, the function is considered active and cannot be replaced. 如果线程的指令指针引用内存中的函数代码,或者线程的内核堆栈引用函数中的返回地址,就认为这个函数是活跃的,无法替换。
Its successor was the4040 processor ( released in1974), which had an expanded instruction set, program memory, register set, and stack. 其后面是4040处理器(1974发布),其具有扩展指令集、程序内存、寄存器集和堆栈。
Memory is a function of direct access to central processing instruction and data memory. 内存是中央处理机能直接存取指令和数据的存储器。
Pronounced "blit," the term derives from the ancient PDP-10 BLT ( block transfer) instruction used to transfer a large block of memory from one location to another. 发音为“blit”,这个术语是从古老的PDP-10BLT(块转移)指令派生而来,这个指令用于将大块内存从一个位置转移到另一个位置。
The control readseach instruction from memory and places it in a control register. 指令码同数据一起存储在存储器中。
Whenever an instruction is fetched from memory, the instruction pointer is translated via the instruction TLB into a physical address. 无论何时从内存中取一个指令,指令指针都会经指令TLB的翻译后指向物理地址。
In computer programming, a high level language instruction that retrieves a value from a program specified memory address location. 在计算机程序设计中的一条高级语言指令,用来从程序指定的内存地址单元中取出一个值。
Based on such study, the content and method of vocabulary instruction should be in accordance with the working mechanism of human memory. 词汇教学应根据记忆的阶段性特征安排符合记忆规律的教学内容和方法。
Vega processors included a custom read barrier instruction that included bit field checking in reference metadata as well as special virtual memory protection for GC-compacted pages. Vega处理器包含了一个客户化的读屏障指令,它具有字段检查元数据和针对GC压缩页面的特殊的虚拟内存保护。
Compile the assembler into machine code so that generate PLE file in order to implement the execution mechanism of PLC virtual machine. In this way, the instruction execution speed of PLC is greatly increased and we can save much memory. 用汇编编译器编译转变成功的汇编程序产生机器码,从而构造出可执行文件&PLE文件,实现PLC虚拟机的机器码执行机制,这样大大提高了PLC指令的执行速度,同时大大节约了内存空间。
Design of the embedded DSPs 'architecture was described at this aspects: bus structure, instruction system, memory system, pipeline and addressing mode, etc. 本文就总线结构、指令系统、存储系统、流水线、寻址方式等几个方面对一个嵌入式DSP处理器μDSP的体系结构设计进行了详细的阐述。
High coding efficiency should have been achieved if data input operation and encoder instruction are working in parallel, which can be realized with some cycling strategy of memory buffers. 主要包括:采用存储缓冲区循环机制,以使数据输入操作与编码器指令并行高效地工作;
Integrally, the RISC CPU has BIU ( Bus Interfacing Unit), IDU ( Instruction Decoding Unit)-. ALU ( Arithmatic& logic Unit), MMU ( Memory Management Unit) etc. 从整体方面来说,整个微处理器大致分为BIU(总线接口单元)、IDU(指令译码单元)、ALU(算术逻辑单元)、MMU(存储管理单元)等等。
Generally there are several ways to improve the performance of parallel program, such as coarse grain parallelism, instruction level and memory optimizing. 一般意义上,提高并行程序的性能采用粗粒度并行,指令级优化(ILP)和存储优化等技术。
An performance analysis method based on instruction and memory analysis model 基于指令和存储器分析模型的性能分析方法
The address space corresponding to instruction memory is always indicated cacheable, which is correct in function. 在任何情况下指令存储器所对应的地址空间都是可缓存的。
On the framework, it develops a universal instruction simulator core and system inter-connection model, processor model, memory model, device model and debug model. 实现了基于虚拟指令集的通用处理器内核,同时实现了通用的系统互联模型,处理器模型,存储器模型、外围设备模型和调试模型。
Therefore, in the fine arts instruction, teachers should place emphasis on cultivating students 'faculties of observation, memory and imagination, ability to discover and express beauty, and good mentality of daring to explore and innovate. 在美术教学中教师应注重培养学生的观察力、记忆力、想象力和发现美、表现美的能力,以及敢于探索,敢于创新的心理素质。
This may suggest that the effect of inhibition due to the instruction of directed forgetting is strong enough for memory materials with high distinctness under the self-referential processing to produce the directed forgetting effect. 这表明,自我参照加工的材料,区辨性很高,因而有意遗忘的指导语激发的抑制作用对它有效,从而出现了遗忘现象。
This article introduce the principle of Digital Signal Processor, specially refer to basic concept and design technique, include: instruction set, pipeline, memory organization, hardware interface, adder, multiplier, clock strategy, test technique. 阐述了数字信号处理器的原理,重点介绍了设计数字信号处理器芯片的简单概念及设计方法,包括指令集、流水线、存储器组织、硬件接口、加法器、乘法器、时钟方案、测试接口等等。
The article essentially describes such points as instruction execution and memory management in constructing a virtual running embedded system. 文中着重介绍了构建嵌入式虚拟运行平台中的指令执行、存储器管理等核心技术问题。
At the same time, optimization is done according to the structure and instruction specialty of the DSP. As a result, memory usage and running efficiency are both satisfied. 同时结合该DSP的结构和指令集特点,进行了一系列优化工作,使代码在存储空间和执行效率上,都较好地满足了应用要求。
Traditional programming model like C, C++ and Fortran are poorly suited to multi-core architectures because of the assumed single instruction stream execution model and centralized memory structure. C、C++和Fortran等基于单指令流和统一存储结构的传统编程模型已经无法适应多核处理器结构。
Quantitative and Qualitative analyses of the VKS tests showed that this kind of vocabulary instruction was quite effective in terms of the short term memory of the target words, and the effectiveness lasted to a great extent for two weeks. 对目标词汇的词汇水平测试的定量和定性分析显示这种词汇教学方式能有效地促进目标词汇的短时记忆,在两周后这种有效性很大程度依旧保留。
The communication of Intangible Cultural Heritage ( ICH) is dynamic and active, which depends on people carriers by means of oral instruction and rote memory. 非物质文化遗产的传播是一种动态的、活态的传播,主要以人为载体,以口传心授的方式进行代际传承。随着老辈传承人的逝世,他们身上的文化内涵也就随之消亡。
New Trimaran supports three kinds of SPM operating instruction, including the instruction for SPM reading and writing by CPU, the DMA instruction for data transfer between SPM and main memory and the SPM initializing instruction. 新的Trimaran版本支持三类SPM操作指令,包括CPU读写SPM的指令,SPM与主存进行数据通信的DMA指令,以及SPM的初始化指令。